As Engineer Sr ASIC, at Honeywell, I led development of radiation hardened ASIC for the GPS receiver aboard the NASA Orion Capsule. This ASIC improved satellite acquisition times by a factor of 7 over the previous generation. Using Matlab, I Developed GPS Constellation simulator, which I ported simulator to SystemVerilog for use by the verification team. The ASIC was a First Pass Success, which had its first flight on EFT-1, in December 2015. The GPS Receiver tracked 7-8 more satellites at orbital apogee (3600 miles) than anticipated, exceeding all expectations. The team received NASA’s Spaceflight Awareness Award.
As Engineer Sr ASIC, at Honeywell, I updated an ARM based System on a Chip as the Backend Synthesis and Timing Lead. I aided the Verification team in pulling together the legacy C based testbench to an organized state, and built a cross-compiler targeting our ARM processor using open source tools. This avoided licensing costs and saved time eliminating legal contracts and negotiations.
As Engineer Sr ASIC, at Honeywell, I successfully brought two FPGAs through DO-254 DAL certification as Design Lead on one and Verification Lead on the other. Designs are in the process of deployment.
As Engineer II, at Honeywell, I designed and verified an FPGA that plays an integral role in Medium Range Missile Defense, currently deployed.